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HI3304的评估板的使用
消耗积分:3 |
格式:rar |
大小:160 |
2009-06-10
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The HI3304 is a 25 MSPS, 4-bit analog-to-digital converter.
It obtains its high speed operability by implementing a
sequential parallel conversion technique. One clock cycle is
required for each conversion. This is achieved by having two
phases during the conversion process, the “Auto Balance”
phase during the low period of the clock and the “Sample
Unknown” phase during the high period of the cycle. For a
complete technical discussion of the architecture and timing
of the converter, please refer to the HI3304 data sheet, available
in the Data Acquisition Products Data Book or it can be
found on the world wide web at
It obtains its high speed operability by implementing a
sequential parallel conversion technique. One clock cycle is
required for each conversion. This is achieved by having two
phases during the conversion process, the “Auto Balance”
phase during the low period of the clock and the “Sample
Unknown” phase during the high period of the cycle. For a
complete technical discussion of the architecture and timing
of the converter, please refer to the HI3304 data sheet, available
in the Data Acquisition Products Data Book or it can be
found on the world wide web at
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