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ADM560,ADM561,pdf datasheet (U
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大小:322 |
2009-06-11
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The ADM560/ADM561 are four driver/five receiver interface devices designed to meet the EIA-232 standard and operate with a single +3.3 V power supply. The devices feature an on-board dc-to-dc converter, eliminating the need for dual ±5 V power supplies. This dc-to-dc converter contains a voltage doubler and voltage inverter, both of which internally generate ±6.6 V from the input +3.3 V power supply.
The ADM560 and the ADM561 consume only 5 mW making them ideally suited for battery and other power-sensitive appli-cations. A shutdown facility is also provided to reduce the power to 0.66 μW.
The ADM560 contains active low shutdown and an active high receiver enable signal. In shutdown mode, two receivers remain active, thereby allowing monitoring of peripheral devices. This feature allows the device to be shut down until a peripheral
device begins communication. The active receivers alert the processor, and then take the ADM560 out of shutdown mode.
The ADM561 features active high shutdown and an active low receiver enable. In this device, all receivers are disabled in shutdown.
The ADM560/ADM561 are fabricated using CMOS technology for minimal power consumption. They feature a high level of over-voltage protection and latch-up immunity. The receiver inputs can withstand up to ±25 V levels. The transmitter inputs can be driven from either 3 V or 5 V logic levels. This allows operation in mixed 3 V/5 V power supply systems.
The ADM560/ADM561 are packaged in a 28-lead SOIC and a 28-lead SSOP package.
The ADM560 and the ADM561 consume only 5 mW making them ideally suited for battery and other power-sensitive appli-cations. A shutdown facility is also provided to reduce the power to 0.66 μW.
The ADM560 contains active low shutdown and an active high receiver enable signal. In shutdown mode, two receivers remain active, thereby allowing monitoring of peripheral devices. This feature allows the device to be shut down until a peripheral
device begins communication. The active receivers alert the processor, and then take the ADM560 out of shutdown mode.
The ADM561 features active high shutdown and an active low receiver enable. In this device, all receivers are disabled in shutdown.
The ADM560/ADM561 are fabricated using CMOS technology for minimal power consumption. They feature a high level of over-voltage protection and latch-up immunity. The receiver inputs can withstand up to ±25 V levels. The transmitter inputs can be driven from either 3 V or 5 V logic levels. This allows operation in mixed 3 V/5 V power supply systems.
The ADM560/ADM561 are packaged in a 28-lead SOIC and a 28-lead SSOP package.
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