8584芯片与未说明技术条件的定时器一起应用的使用说明以及其

1 Table of contents.................................................................................................................3
2 Purpose of this Application Note..........................................................................................4
3 Intel Mode...........................................................................................................................5
3.1 Important Notice ...........................................................................................................5
3.2 Working variants ...........................................................................................................5
3.2.1 Master transmitter with typical timing......................................................................5
3.2.2 Master transmitter with long chip select.................................................................5
3.2.3 Master transmitter with long CS and long WR ........................................................6
3.2.4 Master receiver with typical timing ..........................................................................6
3.2.5 Master receiver with long CS and long RD Critical ! ..............................................6
3.2.6 Master receiver with very long CS ..........................................................................7
3.2.7 Master receiver mode with very long RD Critical ! ................................................7
3.2.8 Master receiver mode with repeated start and write after read ...............................8
3.3 Motorola access sequence in Intel mode ......................................................................9
3.3.1 WR low before CS low............................................................................................9
3.3.2 WR low after CS low Illegal ! ................................................................................9
3.3.3 CS shorter than, and within WR Not working !.....................................................10
4 Motorola Mode...................................................................................................................11
4.1 Access sequences which work under limited circumstances.......................................11
4.1.1 Write access timing Critical ! ...............................................................................11
4.1.2 Master receiver, very long read cycle Critical !.....................................................11
4.1.3 Falling CS before R/W Illegal ! ...........................................................................12
4.1.4 R/W high before CS high......................................................................................12
4.1.5 R/W shorter than CS and within CS low period Illegal ! ......................................12
5 Reset................................................................................................................................13
6 Good to know ....................................................................................................................13
6.1 Detection of I2C bus traffic ..........................................................................................13
6.2 Not detected start in slave mode.................................................................................13
6.3 Live insertion of hardware ...........................................................................................14
6.4 Statusregister S1 ........................................................................................................14
6.5 PCF8584 in systems with micros with on board I2C ....................................................14
7 Multimaster systems..........................................................................................................14
7.1 Power up in Multimaster systems................................................................................15
7.2 Lost arbitration ............................................................................................................15
7.3 Lost arbitration with general call- or own- address ......................................................16
8 Appendix ...........................................................................................................................17
8.1 Recommended literature.............................................................................................17
8.2 Distribution..................................................................................................................17