资料下载
×
DS92LV1212A,pdf datasheet (16-
消耗积分:5 |
格式:rar |
大小:552 |
2009-10-14
生龙活虎3
分享资料个
The DS92LV1212A is an upgrade of the DS92LV1212. It
maintains all of the features of the DS92LV1212. The
DS92LV1212A is designed to be used with the DS92LV1021
Bus LVDS Serializer. The DS92LV1212A receives a Bus
LVDS serial data stream and transforms it into a 10-bit wide
parallel data bus and separate clock. The reduced cable,
PCB trace count and connector size saves cost and makes
PCB layout easier. Clock-to-data and data-to-data skews are
eliminated since one input receives both clock and data bits
serially. The powerdown pin is used to save power by reducing
the supply current when the device is not in use. The
Deserializer will establish lock to a synchronization pattern
within specified lock times but it can also lock to a data
stream without SYNC patterns.
maintains all of the features of the DS92LV1212. The
DS92LV1212A is designed to be used with the DS92LV1021
Bus LVDS Serializer. The DS92LV1212A receives a Bus
LVDS serial data stream and transforms it into a 10-bit wide
parallel data bus and separate clock. The reduced cable,
PCB trace count and connector size saves cost and makes
PCB layout easier. Clock-to-data and data-to-data skews are
eliminated since one input receives both clock and data bits
serially. The powerdown pin is used to save power by reducing
the supply current when the device is not in use. The
Deserializer will establish lock to a synchronization pattern
within specified lock times but it can also lock to a data
stream without SYNC patterns.
声明：本文内容及配图由入驻作者撰写或者入驻合作网站授权转载。文章观点仅代表作者本人，不代表电子发烧友网立场。文章及其配图仅供工程师学习之用，如有内容侵权或者其他违规问题，请联系本站处理。 举报投诉
评论(0)
发评论
- 相关下载
- 相关文章
