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关于basy3硬件介绍
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2017-05-20
黄景瑞
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关于basy3硬件介绍
Introduction In this lab you will use the uart_led design that was introduced in the previous labs. You will use Mark Debug feature and also the available Integrated Logic Analyzer (ILA) core (in IP Catalog) to debug the hardware. Objectives After completing this lab, you will be able to: • Use the Integrated Logic Analyzer (ILA) core from the IP Catalog as a debugging tool • Use Mark Debug feature of Vivado to debug a design • Use hardware debugger to debug a design Procedure This lab is broken into steps that consist of general overview statements providing information on the detailed instructions that follow. Follow these detailed instructions to progress through the lab1. Design Description The design consists of a uart receiver receiving the input typed on a keyboard and displaying the binary equivalent of the typed character on the LEDs. When a push button is pressed, the lower and upper nibbles are swapped when using the ZedBoard or the upper 4-bits are displayed with the Zybo. The block diagram is as shown in Figure 1.
Introduction In this lab you will use the uart_led design that was introduced in the previous labs. You will use Mark Debug feature and also the available Integrated Logic Analyzer (ILA) core (in IP Catalog) to debug the hardware. Objectives After completing this lab, you will be able to: • Use the Integrated Logic Analyzer (ILA) core from the IP Catalog as a debugging tool • Use Mark Debug feature of Vivado to debug a design • Use hardware debugger to debug a design Procedure This lab is broken into steps that consist of general overview statements providing information on the detailed instructions that follow. Follow these detailed instructions to progress through the lab1. Design Description The design consists of a uart receiver receiving the input typed on a keyboard and displaying the binary equivalent of the typed character on the LEDs. When a push button is pressed, the lower and upper nibbles are swapped when using the ZedBoard or the upper 4-bits are displayed with the Zybo. The block diagram is as shown in Figure 1.
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