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1.2A微PMU降压两300毫安LDO监控看门狗和手动复位ADP5041数据表
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The ADP5041 combines one high performance buck regulator and two low dropout regulators （LDO） in a small 20-lead LFCSP to meet demanding performance and board space requirements. The high switching frequency of the buck regulator enables use of tiny multilayer external components and minimizes board space. When the MODE pin is set to logic high， the buck regulator operates in forced PWM mode. When the MODE pin is set to logic low， the buck regulator operates in PWM mode when the load is around the nominal value. When the load current falls below a predefined threshold， the regulator operates in power save mode （PSM）， improving the light load efficiency. The low quiescent current， low dropout voltage， and wide input voltage range of the ADP5041 LDOs extend the battery life of portable devices. The ADP5041 LDOs maintain a power supply rejection greater than 60 dB for frequencies as high as 10 kHz while operating with a low headroom voltage. Each regulator in the ADP5041 is activated by a high level on the respective enable pin. The output voltages of the regulators and the reset threshold are programmed through external resistor dividers to address a variety of applications. The ADP5041 contains supervisory circuits that monitor power supply voltage levels and code execution integrity in microprocessor-based systems. They also provide power-on reset signals. An on-chip watchdog timer can reset the microprocessor if it fails to strobe within a preset timeout period.
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