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MAX1061, MAX1063,pdf,datasheet

消耗积分:5 | 格式:rar | 大小:344 | 2009-12-26

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The MAX1061/MAX1063 low-power, 10-bit analog-to-digital converters (ADCs) feature a successive-approximation ADC, automatic power-down, fast wake-up (2µs), an on-chip clock, +2.5V internal reference, and a high-speed, byte-wide parallel interface. They operate with a single +3V analog supply and feature a VLOGIC pin that allows them to interface directly with a +1.8V to +3.6V digital supply.

Power consumption is only 5.7mW (VDD = VLOGIC) at the maximum sampling rate of 250ksps. Two software-selectable power-down modes enable the MAX1061/MAX1063 to be shut down between conversions; accessing the parallel interface returns them to normal operation. Powering down between conversions can cut supply current to under 10µA at reduced sampling rates.

Both devices offer software-configurable analog inputs for unipolar/bipolar and single-ended/pseudo-differential operation. In single-ended mode, the MAX1061 has eight input channels and the MAX1063 has four input channels (four and two input channels, respectively, when in pseudo-differential mode).

Excellent dynamic performance and low power, combined with ease of use and small package size, make these converters ideal for battery-powered and data-acquisition applications or for other circuits with demanding power consumption and space requirements.

The MAX1061 is available in a 28-pin QSOP package, while the MAX1063 is available in a 24-pin QSOP. For pin-compatible +5V, 10-bit versions, refer to the MAX1060/MAX1064 data sheet.

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