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AD7626 pdf datasheet
消耗积分:3 |
格式:rar |
大小:777 |
2008-08-14
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The AD7626 is a 16-bit, 10MSPS, charge redistribution
successive approximation register (SAR) architecture, analogto-
digital converter (ADC). SAR architecture allows unmatched
performance both in noise – 92dB SNR - and in linearity –
1LSB. The AD7626 contains a high speed 16-bit sampling ADC,
an internal conversion clock, and an internal buffered reference.
On the CNV edge, it samples the voltage difference between
IN+ and IN− pins. The voltages on these pins swing in opposite
phase between 0 V and REF. The 4.096V reference voltage, REF,
can be generated internally or applied externally.
All converted results are available on a single LVDS self-clocked
or echoed-clock serial interface reducing external hardware
connections.
The AD7626 is housed in a 32-lead LFCSP (5mm by 5mm) with
operation specified from −40°C to +85°C.
successive approximation register (SAR) architecture, analogto-
digital converter (ADC). SAR architecture allows unmatched
performance both in noise – 92dB SNR - and in linearity –
1LSB. The AD7626 contains a high speed 16-bit sampling ADC,
an internal conversion clock, and an internal buffered reference.
On the CNV edge, it samples the voltage difference between
IN+ and IN− pins. The voltages on these pins swing in opposite
phase between 0 V and REF. The 4.096V reference voltage, REF,
can be generated internally or applied externally.
All converted results are available on a single LVDS self-clocked
or echoed-clock serial interface reducing external hardware
connections.
The AD7626 is housed in a 32-lead LFCSP (5mm by 5mm) with
operation specified from −40°C to +85°C.
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