This paper presents a new DSP-oriented code optimization method to enhance performance by exploiting the specific architectural features of digital signal processors. In the proposed method, a source code is translated into the static single assignment form while preserving the high-level information related to the address computation of array accesses. The information is used in gener- ating auto-modification addressing operations provided by most digital signal processors. In addi- tion to the conventional control-data flow graph, a new graph is employed to find auto-modification addressingmodes efficiently. Experimental results on benchmark programs show that the proposed method is effective in improving performance and reducing code size. Categories and Subject Descriptors: D.3.4 [Programming Languages]: Processors—compilers; optimization General Terms: Algorithms Additional Key Words and Phrases: Code size, cycle counts, auto-modification addressing