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AD8307,pdf datasheet (Logarithmic Amplifier)
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The AD8307 is the first logarithmic amplifier made available in
an 8-lead (SOIC_N) package. It is a complete 500 MHz monolithic demodulating logarithmic amplifier based on the progressive
compression (successive detection) technique, providing a
dynamic range of 92 dB to ±3 dB law-conformance and 88 dB
to a tight ±1 dB error bound at all frequencies up to 100 MHz. It is extremely stable and easy to use, requiring no significant
external components. A single-supply voltage of 2.7 V to 5.5 V
at 7.5 mA is needed, corresponding to an unprecedented power
consumption of only 22.5 mW at 3 V. A fast acting CMOS-
compatible control pin can disable the AD8307 to a standby
current of less than 150 μA. Each of the cascaded amplifier/limiter cells has a small signal
gain of 14.3 dB, with a −3 dB bandwidth of 900 MHz. The input
is fully differential and at a moderately high impedance (1.1 kΩ
in parallel with about 1.4 pF). The AD8307 provides a basic
dynamic range extending from approximately −75 dBm (where
dBm refers to a 50 Ω source, that is, a sine amplitude of about
±56 μV) up to +17 dBm (a sine amplitude of ±2.2 V). A simple input matching network can lower this range to –88 dBm to +3 dBm. The logarithmic linearity is typically within ±0.3 dB up
to 100 MHz over the central portion of this range, and degrades
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