资料下载
×
DS90UR908Q,pdf datasheet (5 -
消耗积分:3 |
格式:rar |
大小:556 |
2009-10-14
分享资料个
The DS90UR908Q converts FPD-Link II to FPD Link. It translates
a high-speed serialized interface with an embedded
clock over a single pair (FPD-Link II) to four LVDS data/control
streams and one LVDS clock pair (FPD-Link). This serial bus
scheme greatly eases system design by eliminating skew
problems between clock and data, reduces the number of
connector pins, reduces the interconnect size, weight, and
cost, and overall eases PCB layout. In addition, internal DC
balanced decoding is used to support AC-coupled interconnects.
a high-speed serialized interface with an embedded
clock over a single pair (FPD-Link II) to four LVDS data/control
streams and one LVDS clock pair (FPD-Link). This serial bus
scheme greatly eases system design by eliminating skew
problems between clock and data, reduces the number of
connector pins, reduces the interconnect size, weight, and
cost, and overall eases PCB layout. In addition, internal DC
balanced decoding is used to support AC-coupled interconnects.
声明：本文内容及配图由入驻作者撰写或者入驻合作网站授权转载。文章观点仅代表作者本人，不代表电子发烧友网立场。文章及其配图仅供工程师学习之用，如有内容侵权或者其他违规问题，请联系本站处理。 举报投诉
评论(0)
发评论
- 相关下载
- 相关文章
