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74HC4051/74HCT4051 pdf datashe

消耗积分:10 | 格式:rar | 大小:433 | 2008-07-14

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The 74HC4051; 74HCT4051 is a high-speed Si-gate CMOS device and is pin compatible
with Low-power Schottky TTL (LSTTL). The device is specified in compliance with JEDEC
standard no. 7A.
The 74HC4051; 74HCT4051 is an 8-channel analog multiplexer/demultiplexer with three
digital select inputs (S0 to S2), an active-LOW enable input (E), eight independent
inputs/outputs (Y0 to Y7) and a common input/output (Z).
With E LOW, one of the eight switches is selected (low impedance ON-state) by S0 to S2.
With E HIGH, all switches are in the high-impedance OFF-state, independent of S0 to S2.
VCC and GND are the supply voltage pins for the digital control inputs (S0 to S2, and E).
The VCC to GND ranges are 2.0 V to 10.0 V for 74HC4051 and 4.5 V to 5.5 V for
74HCT4051. The analog inputs/outputs (Y0 to Y7, and Z) can swing between VCC as a
positive limit and VEE as a negative limit. VCC − VEE may not exceed 10.0 V.
For operation as a digital multiplexer/demultiplexer, VEE is connected to GND (typically
ground).

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