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3/5伏4/8通道高电平性能模拟多路复用器ADG608/ADG609数据表
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The ADG608 and ADG609 are monolithic CMOS analog multiplexers comprising eight single channels and four differential channels respectively， fully specified for ±5 V， +5 V and +3 V power supplies. The ADG608 switches one of eight inputs to a common output as determined by the 3-bit binary address lines A0， A1 and A2. The ADG609 switches one of four differential inputs to a common differential output as determined by the 2-bit binary address lines A0 and A1. An EN input on both devices is used to enable or disable the device. When disabled， all channels are switched OFF. All the address and enable inputs are TTL compatible over the full specified operating temperature range， making the parts suitable for bus-controlled systems such as data acquisition systems， process controls， avionics and ATEs since the TTL compatible address inputs simplify the digital interface design and reduce the board space requirements. The ADG608/ADG609 are designed on an enhanced LC2 MOS process that provides low power dissipation yet gives high switching speed and low on resistance. Each channel conducts equally well in both directions when ON and has an input signal range which extends to the supplies. In the OFF condition， signal levels up to the supplies are blocked. All channels exhibit break-before-make switching action preventing momentary shorting when switching channels. Inherent in the design is low charge injection for minimum transients when switching the digital inputs.
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