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74HC73 pdf datasheet
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大小:141 |
2008-08-06
370217
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MM54HC73/MM74HC73
Dual J-K Flip-Flops with Clear
General Description
These J-K Flip-Flops utilize advanced silicon-gate CMOS
technology. They possess the high noise immunity and low
power dissipation of standard CMOS integrated circuits.
These devices can drive 10 LS-TTL loads.
These flip-flops are edge sensitive to the clock input and
change state on the negative going transition of the clock
pulse. Each one has independent, J, K, CLOCK, and
CLEAR inputs and Q and Q outputs. CLEAR is independent
of the clock and accomplished by a low level on the input.
The 54HC/74HC logic family is functionally as well as pinout
compatible with the standard 54LS/74LS logic family.
Dual J-K Flip-Flops with Clear
General Description
These J-K Flip-Flops utilize advanced silicon-gate CMOS
technology. They possess the high noise immunity and low
power dissipation of standard CMOS integrated circuits.
These devices can drive 10 LS-TTL loads.
These flip-flops are edge sensitive to the clock input and
change state on the negative going transition of the clock
pulse. Each one has independent, J, K, CLOCK, and
CLEAR inputs and Q and Q outputs. CLEAR is independent
of the clock and accomplished by a low level on the input.
The 54HC/74HC logic family is functionally as well as pinout
compatible with the standard 54LS/74LS logic family.
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