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74HC174 pdf datasheet
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大小:133 |
2008-08-06
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MM54HC174/MM74HC174
Hex D Flip-Flops with Clear
General Description
These edge triggered flip-flops utilize advanced silicon-gate
CMOS technology to implement D-type flip-flops. They possess
high noise immunity, low power, and speeds comparable
to low power Schottky TTL circuits. This device contains
6 master-slave flip-flops with a common clock and common
clear. Data on the D input having the specified setup and
hold times is transferred to the Q output on the low to high
transition of the CLOCK input. The CLEAR input when low,
sets all outputs to a low state.
Each output can drive 10 low power Schottky TTL equivalent
loads. The MM54HC174/MM74HC174 is functionally
as well as pin compatible to the 54LS174/74LS174. All inputs
are protected from damage due to static discharge by
diodes to VCC and ground.
Features
Y Typical propagation delay: 16 ns
Y Wide operating voltage range: 2±6V
Y Low input current: 1 mA maximum
Y Low quiescent current: 80 mA (74HC Series)
Y Output drive: 10 LSTTL loads
Hex D Flip-Flops with Clear
General Description
These edge triggered flip-flops utilize advanced silicon-gate
CMOS technology to implement D-type flip-flops. They possess
high noise immunity, low power, and speeds comparable
to low power Schottky TTL circuits. This device contains
6 master-slave flip-flops with a common clock and common
clear. Data on the D input having the specified setup and
hold times is transferred to the Q output on the low to high
transition of the CLOCK input. The CLEAR input when low,
sets all outputs to a low state.
Each output can drive 10 low power Schottky TTL equivalent
loads. The MM54HC174/MM74HC174 is functionally
as well as pin compatible to the 54LS174/74LS174. All inputs
are protected from damage due to static discharge by
diodes to VCC and ground.
Features
Y Typical propagation delay: 16 ns
Y Wide operating voltage range: 2±6V
Y Low input current: 1 mA maximum
Y Low quiescent current: 80 mA (74HC Series)
Y Output drive: 10 LSTTL loads
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