给出了一种基于FPGA 的等占空比任意整数分频电路的设计方法。首先简要介绍了FPGA 器件的特点和应用范围, 接着讨论了一些常见整数分频的方法, 而本文运用一种新的可控分频器设计方法——脉冲周期剔除法, 主要是对半周期进行计数, 配合时钟反相电路, 可以实现占空比50% 的任意整数分频, 分频系数由控制端给定。本设计在M ax+ P lusÊ开发软件下, 利用VHDL 硬件描述语言和原理图输入方式, 可以方便地实现分频器电路的设计。在文中给出了N = 3 时分频电路设计, 并对电路进行了仿真和测试, 实验结果符合设计要求。
Th is paper gives out a design of the equal duty rat io arbit rary integer frequency divider based on FPGA 1 F irst int roduces the characterist ics and app licat ion domain of FPGA in brief1 Then discusses a few t radit ional integer frequency dividers1 But th is paper p resents a new concep t of p rogrammable frequency divider1A n algo rithm based on the new concep t is int roduced also1U sing th is method can realize 50% duty rat io integral frequency division1 The frequency division coefficient is given by cont ro l end1 The frequency divider is described in VHDL , and synthesized, simulated w ithM ax+ P lusÊ foundat ion1L ast, the N = 3 design p ract ice based on the algo rithm is given, the experimental results show that the perfo rmance has confo rm to the p ropo sed algo rithm1
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