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用于芯片IP模块集成的自动化DRC错误放弃管理
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2010-12-01
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Design rules are created by the foundry to specify known manufacturable feature measurements and configurations
for a given manufacturing process. Design rule checking (DRC) compares a design against these design rules and
identifies violations, which must then be evaluated and corrected by the designer in a process known as debugging.
Design rules are often quite conservative, and it is not uncommon to find layout patterns that can be accurately printed and
will result in acceptable yield levels, but which do not pass the standard design rule checking (DRC) requirements. In
recognition of this dichotomy, foundries often “waive” DRC errors for such design patterns after discussion and
negotiation with the designer.
for a given manufacturing process. Design rule checking (DRC) compares a design against these design rules and
identifies violations, which must then be evaluated and corrected by the designer in a process known as debugging.
Design rules are often quite conservative, and it is not uncommon to find layout patterns that can be accurately printed and
will result in acceptable yield levels, but which do not pass the standard design rule checking (DRC) requirements. In
recognition of this dichotomy, foundries often “waive” DRC errors for such design patterns after discussion and
negotiation with the designer.
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