×

基于FPGA与DSP的雷达高速数据采集系统

消耗积分:5 | 格式:rar | 大小:559 | 2010-12-11

赵辉

分享资料个

 
 激光雷达的发射波及回波信号经光电器件转换形成的电信号具有脉宽窄，幅度低，背景噪声大等特点，对其进行低速数据采集存在数据精度不高等问题。同时，A/D转换器与数字信号处理器直接连接会导致数据传输不及时，影响系统可靠性、实时性。针对激光雷达回拨信号，提出基于FPGA与DSP的高速数据采集系统，利用FPGA内部的异步FIFO和DCM实现A/D转换器与DSP的高速外部存储接口（EMIF）之间的数据传输。介绍了ADC外围电路、工作时序以及DSP的EMIF的设置参数，并对异步FIFO数据读写进行仿真，结合硬件结构详细地分析设计应注意的问题。系统采样率为30 MHz，采样精度为12位。
Abstract:
 Laser radar echo signal converted by photoelectric conversion has the characteristics of narrow pulse width, low amplitude and high background noise. The accuracy of the signal would not be high when using low speed data acquisition. Meanwhile, connecting the digital signal processor to A/D converter directly would lead to the not-timely data transfer, and affect system’s reliability and real-time. This paper proposed a high-speed data acquisition system based on FPGA and DSP aiming at the laser radar echo signal. The data transfer between A/D converter and the high-speed external memory interface （EMIF） of DSP was achieved by using FPGA internal asynchronous FIFO and DCM. The peripheral circuit, timing sequence of ADC and the parameters of EMIF were described, and the timing of writing and reading FIFO was simulated. The key points of the hardware design were also proposed. The sample rate of system is 30MHz, and resolution is 12bits.
下载并关注上传者 低至0.43元/天 开通VIP 免费下载

声明：本文内容及配图由入驻作者撰写或者入驻合作网站授权转载。文章观点仅代表作者本人，不代表电子发烧友网立场。文章及其配图仅供工程师学习之用，如有内容侵权或者其他违规问题，请联系本站处理。 举报投诉

评论(1)
发评论
yangbinyan 2013-04-16
0 回复 举报
学习学习！谢谢~~ 收起回复

下载排行榜

全部1条评论

快来发表一下你的评论吧 !