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MAX4885/MAX4885E pdf datasheet
消耗积分:10 |
格式:rar |
大小:333 |
2009-03-23
赵辉
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The MAX4885E integrates high-bandwidth analog switches and level-translating buffers to implement a complete 1:2 multiplexer for VGA signals. The device provides switching for RGB, display data channel (DDC).
Horizontal and vertical synchronization (HSYNC/VSYNC) inputs feature level-shifting buffers to support low-voltage CMOS or standard TTL-compatible graphics controllers, meeting the VESA requirement of ±8mA. DDC, consisting of SDA_ and SCL_, is a bidirectional active-level translating switch that reduces capacitive load. The MAX4885E features high ESD protection to ±15kV Human Body Model (HBM) on all twelve externally routed terminals. See the Pin Description section in the full data sheet. All other pins are protected to ±10kV Human Body Model (HBM).
The MAX4885E is specified over the extended -40°C to +85°C temperature range, and is available in the 24-pin, 4mm x 4mm TQFN package.
Horizontal and vertical synchronization (HSYNC/VSYNC) inputs feature level-shifting buffers to support low-voltage CMOS or standard TTL-compatible graphics controllers, meeting the VESA requirement of ±8mA. DDC, consisting of SDA_ and SCL_, is a bidirectional active-level translating switch that reduces capacitive load. The MAX4885E features high ESD protection to ±15kV Human Body Model (HBM) on all twelve externally routed terminals. See the Pin Description section in the full data sheet. All other pins are protected to ±10kV Human Body Model (HBM).
The MAX4885E is specified over the extended -40°C to +85°C temperature range, and is available in the 24-pin, 4mm x 4mm TQFN package.
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