×

FPGA器件实现乘法器

消耗积分:5 | 格式:rar | 大小:866 | 2009-03-28

英雄孤寂

分享资料个

Stratix® II, Stratix, Stratix GX, Cyclone™ II, and Cyclone devices have
dedicated architectural features that make it easy to implement highperformance
multipliers. Stratix II, Stratix, and Stratix GX devices feature
embedded high-performance multiplier-accumulators (MACs) in
dedicated digital signal processing (DSP) blocks. DSP blocks can operate
at data rates above 300 million samples per second (MSPS), making
Stratix II, Stratix, and Stratix GX devices ideal for high-speed DSP
applications. Cyclone II devices have embedded multiplier blocks for
DSP.
In addition to the dedicated DSP blocks, designers can also use the
Stratix II, Stratix, and Stratix GX devices’ TriMatrix™ memory blocks to
implement high-performance soft multipliers of variable depths and
widths. For example, designers can useTriMatrix memory blocks as lookup
tables (LUTs) that contain partial results from multiplication of input
data with coefficients. Cyclone II and Cyclone devices have M4K memory
blocks which can be used as LUTs to implement variable depth/width
high-performance soft multipliers for low cost, high volume DSP
applications.

声明:本文内容及配图由入驻作者撰写或者入驻合作网站授权转载。文章观点仅代表作者本人,不代表电子发烧友网立场。文章及其配图仅供工程师学习之用,如有内容侵权或者其他违规问题,请联系本站处理。 举报投诉

评论(1)
发评论
2011-07-13
0 回复 举报
看看 谢谢 收起回复

下载排行榜

全部1条评论

快来发表一下你的评论吧 !