With increasing systems speeds and faster logic families, interconnect characteristics have become significant. The signal transition times of faster families can increase transmission line effects on printed circuit board traces and cables. If not taken into consideration, signal degradation can cause data errors in a system. Previous logic families with slower rise and fall times such as LS and HCMOS were not as severely affected by this issue if line lengths were not too long. For example, an HCMOS buffer with a 5 ns edge will start exhibiting transmission line effects when a circuit board trace is longer than a foot. However, with newer families, even relatively short trace lengths become very important. This application note will briefly review transmission line concepts and evaluate transmission line effects with Philips 5 volt and 3 volt BiCMOS and CMOS logic families such as ABT, AC(T), ALVC, LVC, LVT, and ALVT. For more detailed information on transmission lines, there are many other resources to refer to. The terms line or transmission line will refer to a cable or printed circuit trace medium and will be regarded as equivalent for electrical purposes, though their construction varies in real applications.