This book stems from my experience over the last few years in designing high-speeddigital logic using ASIC design flows. I discovered that while it is possible to significantlyimprove performance in ASIC implementations with deep pipelining and careful physicaldesign, a speed penalty still had to be paid due to their exclusive use of static logic. Thisspurred an interest in using domino logic with automated synthesis and place and routetools. This book documents my experiences in automating the use of domino logic, andshows that despite the challenges entailed in the process, it is possible to use dominologic with industry-standard ASIC tools and achieve a significant speed improvement inthe process.
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