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JTAG先进的功能和系统设计,JTAG Advanced C
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JTAG先进的功能和系统设计,JTAG Advanced Capabilities and System Design
The JTAG bus, originally intended for board-level manufacturing test,
has evolved into a multipurpose bus also used for In-System Programming
(ISP) of FPGAs, FLASH, and processor emulation. Th is article’s
intent is to provide a brief overview of JTAG. Several system-level design
options will be proposed, from the simplest board-level JTAG chain through
a complex embedded multidrop system. Finally, an appendix is included that
contains some useful defi nitions.
Overview: What is JTAG?
Th e Joint Test Action Group (JTAG) is an industry group formed in 1985
to develop a method to test populated circuit boards after manufacture.
Th e group’s work resulted in the IEEE 1149.1 standard entitled Standard
Test Access Port and Boundary-Scan Architecture. Th e terms 1149.1, JTAG,
“dot 1”, and SCAN all refer to the same thing, the IEEE 1149.1 Standard for
Boundary Scan Test.
What is JTAG and what does it do?
1) It is a serial test bus.
2) It adds a Test Access Port (TAP) consisting of four pins to an IC
(fi ve with optional RESET) as shown in Figure 1.
– TDI (Test Data In)
– TDO (Test Data Out)
– TCK (Test Clock)
– TMS (Test Mode Select)
– TRST (Test Reset)
JTAG provides access to interconnected digital cells on an IC:
1) with a method of access for test and diagnostics and the
– ability to do factory and remote testing and diagnostics,
– ability to perform software debug, and
– reduce “No-Fault-Found” problems
2) with a method for in-circuit upgrades and the
– ability to remotely perform system-wide fi rmware upgrades
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