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CD4514BC CD4515BC.pdf

消耗积分:5 | 格式:rar | 大小:122 | 2008-04-02

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The CD4514BC and CD4515BC are 4-to-16 line decoders
with latched inputs implemented with complementary MOS
(CMOS) circuits constructed with N- and P-channel
enhancement mode transistors. These circuits are primarily
used in decoding applications where low power dissipation
and/or high noise immunity is required.
The CD4514BC (output active high option) presents a logical
“1” at the selected output, whereas the CD4515BC presents
a logical “0” at the selected output. The input latches
are R–S type flip-flops, which hold the last input data presented
prior to the strobe transition from “1” to “0”. This
input data is decoded and the corresponding output is activated.
An output inhibit line is also available.
Features
 Wide supply voltage range: 3.0V to 15V
 High noise immunity: 0.45 VDD (typ.)
 Low power TTL: fan out of 2
compatibility: driving 74L
 Low quiescent power dissipation:
0.025 μW/package @ 5.0 VDC
 Single supply operation
 Input impedance = 1012Ω typically
 Plug-in replacement for MC14514, MC14515

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