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ST公司计时器中的时间更新
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2009-05-21
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Figure 1 shows how the non-volatile, static memory array and the quartz controlled clock oscillator, of
TIMEKEEPER devices from STMicroelectronics, are interconnected through the clock registers. The clock
registers are mapped into the memory array (please see the data sheet for the precise mapping) as 8 or
16 BYTEWIDE BIPORT memory cells. The time data in these memory cells are updated from the clock
side (the system side) and are made available to the user side within the user’s finest time resolution.
However, the user’s finest time resolution is one second, so this leaves plenty of scope for variability (of
TIMEKEEPER devices from STMicroelectronics, are interconnected through the clock registers. The clock
registers are mapped into the memory array (please see the data sheet for the precise mapping) as 8 or
16 BYTEWIDE BIPORT memory cells. The time data in these memory cells are updated from the clock
side (the system side) and are made available to the user side within the user’s finest time resolution.
However, the user’s finest time resolution is one second, so this leaves plenty of scope for variability (of
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