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ADCLK846,pdf datasheet (Low Po
消耗积分:2 |
格式:rar |
大小:540 |
2009-09-15
王兰
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The ADCLK846 is a 1.2 GHz/250 MHz, LVDS/CMOS, fanout buffer optimized for low jitter and low power operation. Possible
configurations range from 6 LVDS to 12 CMOS outputs,
including combinations of LVDS and CMOS outputs. Two
control lines are used to determine whether fixed blocks of outputs are LVDS or CMOS outputs.
configurations range from 6 LVDS to 12 CMOS outputs,
including combinations of LVDS and CMOS outputs. Two
control lines are used to determine whether fixed blocks of outputs are LVDS or CMOS outputs.
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