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功率调节约束设计

消耗积分:0 | 格式:rar | 大小:0.14 MB | 2017-06-28

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  功率调节约束设计

  便携式和嵌入式产品空间已经从简单的日子开始,整个系统的基础设施是基于12 V模拟传感器和5 V逻辑电平。随着越来越多的嵌入式显示器,新的传感器,内存,I OS和先进的低功耗控制器的使用,大多数嵌入式系统现在需要大量的电力领域,其中可能包括0.8至1.8伏,2.3伏,2.7伏,3.3伏,5伏和12 V电源的混合物。

  外部电源变压器只提供一个电压电平,所以其余必须在PCB上生成。这通常是使用多个不同的个人权力的监管机构或一个更复杂的电源管理IC(PMIC)。这些集成电路的选择是基于电压输出、当前支持的水平和设计的热操作条件。

  功率调节约束设计

  Why multiple power supplies?

  Today‘s embedded systems are often designed using multiple technologies. Most designs have a combination of components that include MOS, bipolar, MEMS, TFT-LCD, and LED technologies. As process and manufacturing scaling has progressed, the nominal operative voltage for ICs has dropped. The amount of current per transistor has also dropped; however, since there are more transistors per chip in most designs, the net current draw has not necessarily gone down. The use of mixed technology in a design is driving the need for multiple power regulators.

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