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74HC75 pdf datasheet
消耗积分:3 |
格式:rar |
大小:114 |
2008-08-06
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MM54HC75/MM74HC75
4-Bit Bistable Latch with Q and Q Output
General Description
This 4-bit latch utilizes advanced silicon-gate CMOS technology
to achieve the high noise immunity and low power
consumption normally associated with standard CMOS integrated
circuits. These devices can drive 10 LS-TTL loads.
This latch is ideally suited for use as temporary storage for
binary information processing, input/output, and indicator
units. Information present at the data (D) input is transferred
to the Q output when the enable (G) is high. The Q output
will follow the data input as long as the enable remains high.
When the enable goes low, the information that was present
at the data input at the time the transition occurred is retained
at the Q output until the enable is permitted to go
high again.
4-Bit Bistable Latch with Q and Q Output
General Description
This 4-bit latch utilizes advanced silicon-gate CMOS technology
to achieve the high noise immunity and low power
consumption normally associated with standard CMOS integrated
circuits. These devices can drive 10 LS-TTL loads.
This latch is ideally suited for use as temporary storage for
binary information processing, input/output, and indicator
units. Information present at the data (D) input is transferred
to the Q output when the enable (G) is high. The Q output
will follow the data input as long as the enable remains high.
When the enable goes low, the information that was present
at the data input at the time the transition occurred is retained
at the Q output until the enable is permitted to go
high again.
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