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Data Path Design in High Perfo
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Data Path Design in High Performance Reconfigurable DSP Processor
Abstract In this paper, the data path of a high performance reconfigurable DSP processor is introduced. Based on its several 16-bit fixed-point computational units with powerful functions, the data path forms a 16-bit high-speed signal processing platform. By SIMD means, it can flexibly support computations of multi-dimension vector. By the way of reconfiguration, it can efficiently support 32-bit data processing.
Key words digital signal processing; data path; reconfigurable; single instruction stream over multiple data strams; parallel processing
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