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MAX1123 pdf,MAX1123 datasheet
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格式:rar |
大小:666 |
2008-09-11
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The MAX1123 is a monolithic 10-bit, 210Msps analogto-
digital converter (ADC) optimized for outstanding
dynamic performance at high IF frequencies up to
500MHz. The product operates with conversion rates of
up to 210Msps while consuming only 460mW.
At 210Msps and an input frequency of 100MHz, the
MAX1123 achieves a spurious-free dynamic range
(SFDR) of 74.5dBc. Its excellent signal-to-noise ratio
(SNR) of 57.4dB at 10MHz remains flat (within 1.5dB)
for input tones up to 500MHz. This makes the MAX1123
ideal for wideband applications such as digital predistortion
in cellular base-station transceiver systems.
The MAX1123 requires a single 1.8V supply. The analog
input is designed for either differential or singleended
operation and can be AC- or DC-coupled. The
ADC also features a selectable on-chip divide-by-2
clock circuit, which allows the user to apply clock frequencies
as high as 420MHz. This helps to reduce the
phase noise of the input clock source. A differential
LVDS sampling clock is recommended for best performance.
The converter’s digital outputs are LVDS compatible,
and the data format can be selected to be
either two’s complement or offset binary.
The MAX1123 is available in a 68-pin QFN with
exposed pad (EP) and is specified over the industrial
(-40°C to +85°C) temperature range.
For pin-compatible, lower and higher speed versions of
the MAX1123, refer to the MAX1122 (170Msps) and the
MAX1124 (250Msps) data sheets. For a higher speed,
pin-compatible 8-bit version of the MAX1123, refer to
the MAX1121 data sheet.
Applications
Wireless and Wired Broadband Communication
Cable-Head End Systems
Digital Predistortion Receivers
Communications Test Equipment
Radar and Satellite Subsystems Antenna Array
Processing
digital converter (ADC) optimized for outstanding
dynamic performance at high IF frequencies up to
500MHz. The product operates with conversion rates of
up to 210Msps while consuming only 460mW.
At 210Msps and an input frequency of 100MHz, the
MAX1123 achieves a spurious-free dynamic range
(SFDR) of 74.5dBc. Its excellent signal-to-noise ratio
(SNR) of 57.4dB at 10MHz remains flat (within 1.5dB)
for input tones up to 500MHz. This makes the MAX1123
ideal for wideband applications such as digital predistortion
in cellular base-station transceiver systems.
The MAX1123 requires a single 1.8V supply. The analog
input is designed for either differential or singleended
operation and can be AC- or DC-coupled. The
ADC also features a selectable on-chip divide-by-2
clock circuit, which allows the user to apply clock frequencies
as high as 420MHz. This helps to reduce the
phase noise of the input clock source. A differential
LVDS sampling clock is recommended for best performance.
The converter’s digital outputs are LVDS compatible,
and the data format can be selected to be
either two’s complement or offset binary.
The MAX1123 is available in a 68-pin QFN with
exposed pad (EP) and is specified over the industrial
(-40°C to +85°C) temperature range.
For pin-compatible, lower and higher speed versions of
the MAX1123, refer to the MAX1122 (170Msps) and the
MAX1124 (250Msps) data sheets. For a higher speed,
pin-compatible 8-bit version of the MAX1123, refer to
the MAX1121 data sheet.
Applications
Wireless and Wired Broadband Communication
Cable-Head End Systems
Digital Predistortion Receivers
Communications Test Equipment
Radar and Satellite Subsystems Antenna Array
Processing
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