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CADENCE SIP DIGITAL SI
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2008-10-16
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CADENCE SIP DIGITAL SI
To take full advantage of system-in-package (SiP) design, systems engineers require
a new set of solutions that address the specific challenges of integrating embedded
ICs with the target system interconnect. Cadence
SiP Digital SI fully integrates
digital signal integrity (SI), analysis, interconnect extraction, and modeling with
the physical SiP design environment. By combining proven SI technology in an
environment that permits interactive editing of die-to-die and substrate
interconnect, SiP design engineers can optimize a design to meet both electrical
and physical requirements°(TM)while achieving reduced design cycle times
To take full advantage of system-in-package (SiP) design, systems engineers require
a new set of solutions that address the specific challenges of integrating embedded
ICs with the target system interconnect. Cadence
SiP Digital SI fully integrates
digital signal integrity (SI), analysis, interconnect extraction, and modeling with
the physical SiP design environment. By combining proven SI technology in an
environment that permits interactive editing of die-to-die and substrate
interconnect, SiP design engineers can optimize a design to meet both electrical
and physical requirements°(TM)while achieving reduced design cycle times
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