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RT9173D pdf datasheet (Cost-Ef
消耗积分:3 |
格式:rar |
大小:333 |
2008-12-12
小组店小二
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The RT9173D is a simple, cost-effective and high-speed
linear regulator designed to generate termination voltage
in double data rate (DDR) memory system to comply with
the JEDEC SSTL_2 and SSTL_18 or other specific
interfaces such as HSTL, SCSI-2 and SCSI-3 etc. devices
requirements. The regulator is capable of actively sinking
or sourcing continuous 2A or up to 3A transient peak
current while regulating an output voltage to within 40mV.
The output termination voltage cab be tightly regulated to
track 1/2VDDQ by two external voltage divider resistors or
the desired output voltage can be pro-grammed by externally
forcing the REFEN pin voltage.
The RT9173D also incorporates a high-speed differential
amplifier to provide ultra-fast response in line/load transient.
Other features include extremely low initial offset voltage,
excellent load regulation, current limiting in bi-directions
and on-chip thermal shut-down protection.
The RT9173D are available in the SOP-8 (Exposed Pad)
surface mount packages.
linear regulator designed to generate termination voltage
in double data rate (DDR) memory system to comply with
the JEDEC SSTL_2 and SSTL_18 or other specific
interfaces such as HSTL, SCSI-2 and SCSI-3 etc. devices
requirements. The regulator is capable of actively sinking
or sourcing continuous 2A or up to 3A transient peak
current while regulating an output voltage to within 40mV.
The output termination voltage cab be tightly regulated to
track 1/2VDDQ by two external voltage divider resistors or
the desired output voltage can be pro-grammed by externally
forcing the REFEN pin voltage.
The RT9173D also incorporates a high-speed differential
amplifier to provide ultra-fast response in line/load transient.
Other features include extremely low initial offset voltage,
excellent load regulation, current limiting in bi-directions
and on-chip thermal shut-down protection.
The RT9173D are available in the SOP-8 (Exposed Pad)
surface mount packages.
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