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82C85 pdf datasheet (CMOS Stat
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大小:233 |
2009-01-09
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The Intersil 82C85 Static CMOS Clock Controller/Generator
provides complete control of static CMOS system operating
modes and supports full speed, slow, stop-clock and
stop-oscillator operation. While directly compatible with the
Intersil 80C86 and 80C88 16-bit Static CMOS Microprocessor
Family, the 82C85 can also be used for general system
clock control.
For static system designs, separate signals are provided
on the 82C85 for stop (S0, S1, S2/STOP) and start
(START) control of the crystal oscillator and system clocks.
A single control line (SLO/FST) determines 82C85 fast
(crystal/EFI frequency divided by 3) or slow (crystal/EFI
frequency divided by 768) mode operation. Automatic
maximum mode 80C86 and 80C88 software HALT
instruction decode logic in the 82C85 enables softwarebased
clock control. Restart logic insures valid clock startup
and complete synchronization of system clocks.
The 82C85 is manufactured using the Intersil advanced
Scaled SAJI IV CMOS process. In addition to clock control
circuitry, the 82C85 also contains a crystal controlled
oscillator (up to 25MHz), clock generation logic, complete
“Ready” synchronization and reset logic. This permits the
designer to tailor the system power-performance product to
provide optimum performance at low power levels.
provides complete control of static CMOS system operating
modes and supports full speed, slow, stop-clock and
stop-oscillator operation. While directly compatible with the
Intersil 80C86 and 80C88 16-bit Static CMOS Microprocessor
Family, the 82C85 can also be used for general system
clock control.
For static system designs, separate signals are provided
on the 82C85 for stop (S0, S1, S2/STOP) and start
(START) control of the crystal oscillator and system clocks.
A single control line (SLO/FST) determines 82C85 fast
(crystal/EFI frequency divided by 3) or slow (crystal/EFI
frequency divided by 768) mode operation. Automatic
maximum mode 80C86 and 80C88 software HALT
instruction decode logic in the 82C85 enables softwarebased
clock control. Restart logic insures valid clock startup
and complete synchronization of system clocks.
The 82C85 is manufactured using the Intersil advanced
Scaled SAJI IV CMOS process. In addition to clock control
circuitry, the 82C85 also contains a crystal controlled
oscillator (up to 25MHz), clock generation logic, complete
“Ready” synchronization and reset logic. This permits the
designer to tailor the system power-performance product to
provide optimum performance at low power levels.
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