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CD4541BC.pdf
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2008-04-02
凤毛麟角
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The CD4541BC Programmable Timer is designed with a
16-stage binary counter, an integrated oscillator for use
with an external capacitor and two resistors, output control
logic, and a special power-on reset circuit. The special features
of the power-on reset circuit are first, no additional
static power consumption and second, the part functions
across the full voltage range (3V–15V) whether power-on
reset is enabled or disabled.
Timing and the counter are initialized by turning on power,
if the power-on reset is enabled. When the power is
already on, an external reset pulse will also initialize the
timing and counter. After either reset is accomplished, the
oscillator frequency is determined by the external RC network.
The 16-stage counter divides the oscillator frequency
by any of 4 digitally controlled division ratios.
Features
n Available division ratios 28, 210, 213, or 216
n Increments on positive edge clock transitions
n Built-in low power RC oscillator (±2% accuracy over
temperature range and ±10% supply and ±3% over processing
@ < 10 kHz)
n Oscillator frequency range » DC to 100 kHz
n Oscillator may be bypassed if external clock is available
(apply external clock to pin 3)
n Automatic reset initializes all counters when power turns
on
n External master reset totally independent of automatic
reset operation
n Operates at 2n frequency divider or single transition
timer
n Q/Q select provides output logic level flexibility
n Reset (auto or master) disables oscillator during resetting
to provide no active power dissipation
n Clock conditioning circuit permits operation with very
slow clock rise and fall times
n Wide supply voltage range—3.0V to 15V
n High noise immunity—0.45 VDD (typ.)
n 5V–10V–15V parameter ratings
n Symmetrical output characteristics
n Maximum input leakage 1 mA at 15V over full temperature
range
n High output drive (pin 8) min. one TTL load
16-stage binary counter, an integrated oscillator for use
with an external capacitor and two resistors, output control
logic, and a special power-on reset circuit. The special features
of the power-on reset circuit are first, no additional
static power consumption and second, the part functions
across the full voltage range (3V–15V) whether power-on
reset is enabled or disabled.
Timing and the counter are initialized by turning on power,
if the power-on reset is enabled. When the power is
already on, an external reset pulse will also initialize the
timing and counter. After either reset is accomplished, the
oscillator frequency is determined by the external RC network.
The 16-stage counter divides the oscillator frequency
by any of 4 digitally controlled division ratios.
Features
n Available division ratios 28, 210, 213, or 216
n Increments on positive edge clock transitions
n Built-in low power RC oscillator (±2% accuracy over
temperature range and ±10% supply and ±3% over processing
@ < 10 kHz)
n Oscillator frequency range » DC to 100 kHz
n Oscillator may be bypassed if external clock is available
(apply external clock to pin 3)
n Automatic reset initializes all counters when power turns
on
n External master reset totally independent of automatic
reset operation
n Operates at 2n frequency divider or single transition
timer
n Q/Q select provides output logic level flexibility
n Reset (auto or master) disables oscillator during resetting
to provide no active power dissipation
n Clock conditioning circuit permits operation with very
slow clock rise and fall times
n Wide supply voltage range—3.0V to 15V
n High noise immunity—0.45 VDD (typ.)
n 5V–10V–15V parameter ratings
n Symmetrical output characteristics
n Maximum input leakage 1 mA at 15V over full temperature
range
n High output drive (pin 8) min. one TTL load
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