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ad7865 pdf
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2008-04-14
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The AD7865 is a fast, low power, four-channel simultaneous
sampling 14-bit A/D converter that operates from a single 5 V
supply. The part contains a 2.4 µs successive approximation
ADC, four track/hold amplifiers, 2.5 V reference, on-chip clock
oscillator, signal conditioning circuitry and a high speed parallel
interface. The input signals on four channels are sampled simul-
taneously thus preserving the relative phase information of the
signals on the four analog inputs. The part accepts analog input
ranges of ±10 V, ±5 V, ±2.5 V, 0 V to 2.5 V and 0 V to 5 V.
The part allows any subset of the four channels to be converted
in order to maximize the throughput rate on the selected sequence.
The channels to be converted can be selected either via hard-
ware (channel select input pins) or via software (programming
the channel select register).
A single conversion start signal (CONVST) simultaneously places
all the track/holds into hold and initiates conversion sequence
for the selected channels. The EOC signal indicates the end of
each individual conversion in the selected conversion sequence.
The BUSY signal indicates the end of the conversion sequence.
Data is read from the part via a 14-bit parallel data bus using the
standard CS and RD signals. Maximum throughput for a single
channel is 350 kSPS. For all four channels the maximum through-
put is 100 kSPS.
sampling 14-bit A/D converter that operates from a single 5 V
supply. The part contains a 2.4 µs successive approximation
ADC, four track/hold amplifiers, 2.5 V reference, on-chip clock
oscillator, signal conditioning circuitry and a high speed parallel
interface. The input signals on four channels are sampled simul-
taneously thus preserving the relative phase information of the
signals on the four analog inputs. The part accepts analog input
ranges of ±10 V, ±5 V, ±2.5 V, 0 V to 2.5 V and 0 V to 5 V.
The part allows any subset of the four channels to be converted
in order to maximize the throughput rate on the selected sequence.
The channels to be converted can be selected either via hard-
ware (channel select input pins) or via software (programming
the channel select register).
A single conversion start signal (CONVST) simultaneously places
all the track/holds into hold and initiates conversion sequence
for the selected channels. The EOC signal indicates the end of
each individual conversion in the selected conversion sequence.
The BUSY signal indicates the end of the conversion sequence.
Data is read from the part via a 14-bit parallel data bus using the
standard CS and RD signals. Maximum throughput for a single
channel is 350 kSPS. For all four channels the maximum through-
put is 100 kSPS.
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