资料下载
×
如何将CY7B951或CY7B952的5V PECL输出接至
消耗积分:5 |
格式:rar |
大小:23 |
2009-06-15
訾存贵
分享资料个
This document describes how to connect the 5V PECL outputs
of the CY7B951 or CY7B952 to 3.3V PECL inputs, and
also how to connect the 5V PECL inputs of the CY7B951 or
CY7B952 to 3.3V PECL outputs of some framer chips.
CY7B951 and CY7B952 are clock and data recovery chips
for 155.52-Mbps and 51.84-Mbps signals.
of the CY7B951 or CY7B952 to 3.3V PECL inputs, and
also how to connect the 5V PECL inputs of the CY7B951 or
CY7B952 to 3.3V PECL outputs of some framer chips.
CY7B951 and CY7B952 are clock and data recovery chips
for 155.52-Mbps and 51.84-Mbps signals.
声明：本文内容及配图由入驻作者撰写或者入驻合作网站授权转载。文章观点仅代表作者本人，不代表电子发烧友网立场。文章及其配图仅供工程师学习之用，如有内容侵权或者其他违规问题，请联系本站处理。 举报投诉
评论(0)
发评论
- 相关下载
- 相关文章
