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74180 TTL 9位奇数、偶数发生器、校验器
479809
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These universal 9-bit (8 data bits plus 1 parity bit) parity
generators/checkers feature odd/even outputs and control
inputs to facilitate operation in either odd or even parity applications.
Depending on whether even or odd parity is being
generated or checked, the even or odd input can be
utilized as the parity or 9th-bit input. The word-length capability
is easily expanded by cascading.
Input buffers are provided so that each data input represents
only one normalized series 54/74 load. A full fan-out
to 10 normalized series 54/74 loads is available from each
of the outputs at a low logic level. A fan-out to 20 normalized
loads is provided at a high logic level to facilitate the
connection of unused inputs to used inputs.
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