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74HC/HCT4351 pdf datasheet

消耗积分:5 | 格式:rar | 大小:444 | 2008-07-14

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The 74HC/HCT4351 are high-speed Si-gate CMOS
devices. They are specified in compliance with JEDEC
standard no. 7A.The 74HC/HCT4351 are 8-channel analog
multiplexers/demultiplexers with three select inputs (S0 to
S2), two enable inputs (E1 and E2), a latch enable input
(LE), eight independent inputs/outputs (Y0 to Y7) and a
common input/output (Z).
With E1 LOW and E2 is HIGH, one of the eight switches is
selected (low impedance ON-state) by S0 to S2. The data
at the select inputs may be latched by using the active
LOW latch enable input (LE). When LE is HIGH the latch
is transparent. When either of the two enable inputs,
E1 (active LOW) and E2 (active HIGH), is inactive, all 8
analog switches are turned off.
VCC and GND are the supply voltage pins for the digital
control inputs (S0 to S2, LE, E1 and E2). The VCC to GND
ranges are 2.0 to 10.0 V for HC and 4.5 to 5.5 V for HCT.
The analog inputs/outputs (Y0 to Y7, and Z) can swing
between VCC as a positive limit and VEE as a negative
limit.
VCC − VEE may not exceed 10.0 V.
For operation as a digital multiplexer/demultiplexer, VEE is
connected to GND (typically ground).

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