High Performance RISC CPU:
• Linear program memory addressing to 64 Kbytes
• Linear data memory addressing to 4 Kbytes
• 1 Kbyte of data EEPROM
• Up to 10 MIPs operation:
- DC - 40 MHz osc./clock input
- 4 MHz - 10 MHz osc./clock input with PLL active
• 16-bit wide instructions, 8-bit wide data path
• Priority levels for interrupts
• 31-level, software accessible hardware stack
• 8 x 8 Single Cycle Hardware Multiplier
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