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设计FPGA和ASIC的高效电源解决方案
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设计FPGA和ASIC的高效电源解决方案
现场可编程门阵列（FPGA）和专用集成电路是现代电子设备中常见的设备。为这些设备供电需要特别注意，因为复杂的初始条件，如在负载点（油），瞬态行为和开启/关闭规格严格监管。绕过或去耦设备上的电源（根据设备的应用程序）也需要仔细考虑。最后，功耗、占用空间和成本将影响设计。
如图1所示，需要两个或两个以上的电压来为FPGA或ASIC供电。核心的电压通常在1到2.5伏之间，而I/O的其他电压大约为3.3 V。它也可能需要一个第三的低噪声，低纹波电压，大约2.5 V或3.3 V，取决于各个家庭，以辅助电路供电。
Figure 1： Two or more voltages are needed to power an FPGA or an ASIC. One voltage for the core and the other voltage for the I/Os. It may also require a third， low-noise， low-ripple voltage to power the auxiliary circuits.
While the applied voltages to the FPGA/ASIC device are fixed， the operating current for each of these voltages is not. It depends on many application-related factors such as FPGA speed， capacity utilization， and so on. A power design feature article byNational Semiconductor application engineer David Baba¹ focuses on considerations for FPGAs and ASICs and provides some insight into powering these devices. It shows that the operating current for an FPGA could vary from as little as 100 mA to as high as 20 A.
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