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MCP1826/MCP1826S pdf datasheet
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格式:rar |
大小:555 |
2008-08-07
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The MCP1826/MCP1826S is a 1000 mA Low Dropout
(LDO) linear regulator that provides high current and
low output voltages. The MCP1826 comes in a fixed or
adjustable output voltage version, with an output
voltage range of 0.8V to 5.0V. The 1000 mA output current
capability, combined with the low output voltage
capability, make the MCP1826 a good choice for new
sub-1.8V output voltage LDO applications that have
high current demands. The MCP1826S is a 3-pin fixed
voltage version.
The MCP1826/MCP1826S is stable using ceramic
output capacitors that inherently provide lower output
noise and reduce the size and cost of the entire
regulator solution. Only 1 μF of output capacitance is
needed to stabilize the LDO.
Using CMOS construction, the quiescent current
consumed by the MCP1826/MCP1826S is typically
less than 120 μA over the entire input voltage range,
making it attractive for portable computing applications
that demand high output current. The MCP1826
versions have a Shutdown (SHDN) pin. When shut
down, the quiescent current is reduced to less than
0.1 μA.
On the MCP1826 fixed output versions the scaleddown
output voltage is internally monitored and a
power good (PWRGD) output is provided when the
output is within 92% of regulation (typical). The
PWRGD delay is internally fixed at 200 μs (typical).
The overtemperature and short circuit current-limiting
provide additional protection for the LDO during system
fault conditions.
(LDO) linear regulator that provides high current and
low output voltages. The MCP1826 comes in a fixed or
adjustable output voltage version, with an output
voltage range of 0.8V to 5.0V. The 1000 mA output current
capability, combined with the low output voltage
capability, make the MCP1826 a good choice for new
sub-1.8V output voltage LDO applications that have
high current demands. The MCP1826S is a 3-pin fixed
voltage version.
The MCP1826/MCP1826S is stable using ceramic
output capacitors that inherently provide lower output
noise and reduce the size and cost of the entire
regulator solution. Only 1 μF of output capacitance is
needed to stabilize the LDO.
Using CMOS construction, the quiescent current
consumed by the MCP1826/MCP1826S is typically
less than 120 μA over the entire input voltage range,
making it attractive for portable computing applications
that demand high output current. The MCP1826
versions have a Shutdown (SHDN) pin. When shut
down, the quiescent current is reduced to less than
0.1 μA.
On the MCP1826 fixed output versions the scaleddown
output voltage is internally monitored and a
power good (PWRGD) output is provided when the
output is within 92% of regulation (typical). The
PWRGD delay is internally fixed at 200 μs (typical).
The overtemperature and short circuit current-limiting
provide additional protection for the LDO during system
fault conditions.
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