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MAX1401 pdf datasheet
消耗积分:3 |
格式:rar |
大小:666 |
2008-10-06
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The MAX1401 18-bit, low-power, multichannel, serial-output ADC uses a sigma-delta modulator with a digital decimation filter to achieve true 16-bit accuracy. The user-selectable decimation factor of the digital filter allows the conversion resolution to be reduced in exchange for a higher output data rate. The device achieves true 16-bit performance at an output data rate of up to 480sps. In addition, the modulator sampling frequency may be optimized for either lowest power dissipation or highest throughput rate. The MAX1401 operates from +3V.
This device offers three fully differential input channels that can be independently programmed with a gain between +1V/V and +128V/V. Furthermore, it can compensate an input-referred DC offset (such as system offset) up to 117% of the selected full-scale range. These three differential channels may also be configured to operate as five pseudo-differential input channels. Two additional, fully differential system-calibration channels are provided for gain and offset error correction. External access is provided to the multiplexer (mux) output to facilitate additional signal processing.
The MAX1401 can be configured to sequentially scan all signal inputs and provide the results through the serial interface with minimum communications overhead. When used with a 2.4576MHz or 1.024MHz master clock, the digital decimation filter can be programmed to produce zeros in its frequency response at the line frequency and associated harmonics, ensuring excellent line rejection without the need for further postfiltering.
The MAX1401 is available in a 28-pin SSOP package.
This device offers three fully differential input channels that can be independently programmed with a gain between +1V/V and +128V/V. Furthermore, it can compensate an input-referred DC offset (such as system offset) up to 117% of the selected full-scale range. These three differential channels may also be configured to operate as five pseudo-differential input channels. Two additional, fully differential system-calibration channels are provided for gain and offset error correction. External access is provided to the multiplexer (mux) output to facilitate additional signal processing.
The MAX1401 can be configured to sequentially scan all signal inputs and provide the results through the serial interface with minimum communications overhead. When used with a 2.4576MHz or 1.024MHz master clock, the digital decimation filter can be programmed to produce zeros in its frequency response at the line frequency and associated harmonics, ensuring excellent line rejection without the need for further postfiltering.
The MAX1401 is available in a 28-pin SSOP package.
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