The ADRV9009-ZU11EG is a highly integrated RF System-On-Module(RF-SOM) based on the Analog Devices ADRV9009 and Xilinx Zynq UltraScale+ MPSoC. The RF-SOM can be used as a sub-part in a larger customer system or as an evaluation and prototyping platform. To use the RF-SOM for evaluation and prototyping a carrier board is required. The Analog Devices ADRV2CRR-FMC Carrier board is designed for this purpose, or a customer can develop their own custom carrier or system board. An additional RF Transceiver board can also be fitted to the carrier to further expand the system up to 8 Tx and Rx radio channels.

The RF-SOM box includes:

• ADRV9009-ZU11EG RF-SOM
• Heat spreader plate(fitted to the RF-SOM during manufacturing)

The Carrier box includes:

• ADRV2CRR-FMC carrier board(needed to evaluate the RF-SOM), Fan Heatsink and other accessories to get the user up and running
• Full details found in the Carrier section

• Two ADRV9009 devices, providing (in total):
  • Quad transmitters
  • Quad receivers
  • Quad input Observation Receiver for DPD
  • Max Rx BW: 200 MHz
  • Max Tunable Tx synthesis BW: 450 MHz
  • Max Observation Rx BW: 450MHz
  • Fully integrated fractional-N RF synthesizers
  • Multi-chip phase synchronization for all RF LO and baseband clocks
  • Tuning range: 75 MHz to 6000 MHz

• Zynq UltraScale+ ZU11EG
  • Quad-core ARM® Cortex-A53 platform running up to 1.5GHz
    • L1 Cache 32KB I / D per core, L2 Cache 1MB, on-chip Memory 256KB
  • Dual-core Cortex-R5 real-time processors
    • L1 Cache 32KB I / D per core, Tightly Coupled Memory 128KB per core
  • Mali-400 MP2 graphics processing unit up to 667 MHz
  • PCIe® Gen2 x4, 2x USB3.0, SATA 3.1, DisplayPort, 4x Tri-mode Gigabit Ethernet
  • 2xUSB 2.0, 2x SD/SDIO, 2x UART, 2x CAN 2.0B, 2x I2C, 2x SPI, 4x 32b GPIO
  • 16nm FinFET+ programmable logic
    • 653k System Logic Cells
• On Board Memory:
  • Processing System (Dedicated for ARM Cores) : 4 GByte DDR4(x64) (with ECC)
  • Programmable Logic (Dedicated for RF Data) : Two independent banks of 2 GByte DDR4(x32)
  • 1Gbit serial flash for image storage
  • removable SD-Card for secure file storage
• On SOM Peripherals
  • Ethernet Phy
  • USB 2.0 Phy
  • 12V supply via FMC connectors
  • uSD Card holder
• Operating temperature
  • The ambient operating and storage temperature range supported for X-Grade systems with the current heat spreader plate and heatsink is -40⁰C to +65⁰C

• ADRV9009-ZU11EG
• Included are further details on the RF-SOM schematics, BOM, system clocking tree, mechanical specs, power tree, electrical interface.

• ADRV2CRR-EBZ
• Included are schematics, BOM, mechanical specs, high level system view.

• FMCOMMS8
• Included are schematics, BOM, mechanical specs, high level system view, Start Guide with link the the required software to get up and running.

Multiple ADRV9009-ZU11EG’s can be synchronized together enabling a complete solution for complex multi-stream applications ensuring end-to-end deterministic latency. The ADRV9009 Transceivers include integrated LO and phase synchronization. Overall system frequency & phase synchronization is maintained with a clock tree structure using ADI high performance low jitter HMC7044 devices, making it ideal for applications requiring RF phase alignment with a large number of channels.

The ADRV9009-ZU11EG has extensive I/O capability. Combined with the ADRV2CRR-FMC evaluation carrier board a variety of high speed I/O can be evaluated, including USB3, USB2, PCIe 3.0 x8, QSFP+, SFP+, 1Gb Ethernet x2, and CPRI capability. Please review the I/O functionality reference table provided in the ADRV2CRR-FMC homepage for more details on the functionality provided.

An additional High Pin Count FMC Daughter Board (ADFMCOMMS8-EBZ) can be plugged into the carrier board with a further two ADRV9009 Transceivers increasing to a total of Eight Tx and Rx channels. A design can easily be evaluated and then integrated seamlessly into a custom carrier for further prototyping, or a final product greatly accelerating time to market.

Platform development support includes examples of Linux Industrial I/O (IIO) Applications, MATLAB®, Simulink®, GNU Radio, and streaming interfaces for custom C, C++, python, and C# applications. HDL reference designs and drivers will be provided to help users get up and running faster. Due to varying implementation options for the various I/O interfaces different levels of functionality will be provided for each one, further details will be available in the applications section.

The ADRV9009-ZU11EG kit is delivered with an SD card containing a bootable image to get the user started in evaluating the system.

Users should check that they have the appropriate Vivado license in place to be able to use and build the reference HDL code provided for the Ultrascale+ MPSOC in the system.

People who follow the flow that is outlined, have a much better experience with things. However, like many things, documentation is never as complete as it should be. If you have any questions, feel free to ask.

1. Getting started with the ADRV9009-ZU11EG
   1. ADRV9009-ZU11EG Quick Start Guide
      1. Configure a pre-existing SD-Card
      2. Update the old card you received with your hardware
   2. Performance Characteristics 'Pending Update'
   3. Linux Applications
      1. IIO Scope
         1. ADRV9009/ADRV9008 IIO Scope View
         2. ADRV9009/ADRV9008 Control IIO Scope Plugin
         3. Advanced ADRV9009/ADRV9008 Control IIO Scope Plugin
      2. FRU EEPROM Utility
   4. Push custom data into/out of the ADRV9009
      1. Basic Data files and formats
      2. Stream data into/out of MATLAB
2. Design with the ADRV9009
   1. Understanding the ADRV9009
      1. ADRV9009 Product page
      2. Full Datasheet and chip design package
      3. MATLAB Filter Wizard / Profile Generator for ADRV9009
   2. Hardware in the Loop / How to design your own custom BaseBand
      1. GNU Radio
      2. Board Support Package for MathWorks Tools
   3. Design with the ADRV9009-ZU11EG based platform
      1. Linux software
         1. ADRV9009/ADRV9008 Linux Device Driver
            1. ADRV9009/ADRV9008 Device Driver Customization
            2. Customizing the devicetree on the target
         2. JESD204 (FSM) Interface Linux Kernel Framework
         3. HMC7044 Clock Jitter Attenuator with JESD204B Linux Driver
         4. AXI-DMAC DMA Controller Linux Driver
         5. JESD204B Transmit Linux Driver
            1. JESD204B Status Utility
         6. JESD204B Receive Linux Driver
            1. JESD204B Status Utility
         7. AXI JESD204B GT HDL Linux Driver
            1. JESD204 Eye Scan
         8. AXI ADC HDL Linux Driver
         9. AXI DAC HDL Linux Driver
      2. ADRV9009/ADRV9008 No-OS System Level Design Setup
      3. HDL Reference Design
      4. ADRV9009-ZU11EG Multi-SOM Synchronization

Software Defined Radio for Engineers

Additional Documentation about SDR Signal Chains - The math behind the RF

Details on how the ADRV9009-ZU11EG is functionally tested can be found here.

• ADRV9009-ZU11EG Production Test

For questions and more information please contact us on the Analog Devices Engineer Zone.