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2.5Gb/s 16:1 复用器电路设计

消耗积分:3 | 格式:rar | 大小:321 | 2009-06-06

陆军航空兵

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本文采用0.18μm CMOS工艺设计了用于2.5Gb/s收发器系统的16:1复用器电路。该电路采用数模混合的方法进行设计,第一级用数字电路实现16:4的复用,第二级用模拟电路实现4:1的复用,从而实现16:1的复用器。该电路采用SMIC 0.18μm工艺模型,使用Virtuoso AMS Simulator 工具进行了仿真。仿真结果表明,当电源电压为1.8V,温度范围为0~70℃时,电路可以工作在2.5b/s,功耗约为6mW。
关键词:收发器;复用器;数模混合

2.5Gb/s 16:1 Multiplexer Circuit Design Xing Li-dong1,2, Jiang Lin1 (1.Department of Computer Science, Xi’an University of Post & Telecommunications, Xi’an, 710061,China;
2.School of microelectronics ,Xidian University,Xi’an,710071,China) Abstract: A 16:1 multiplexer for 2.5Gb/s transceiver system designed with 0.18μm CMOS technology is presented in this paper. The circuit is designed with digital/analog mixed-signal methodology. The first level is realized with digital circuit for the 16:4 multiplexer , and the second level realize the 4:1 multiplexer by analog circuit. The circuit is simulated with SMIC 0.18μm CMOS model by Virtuoso AMS Simulator. It is shown that the circuit can run at a high speed of 2.5Gb/s under a 1.8V power supply and the temperature is between 0~70℃. Its power dissipation is about 6mW.
Key words: transceiver; multiplexer; digital/analog mixed-signal

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