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The Design of a Clock Synchron
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Software tools are being developed to support a design methodology specic to parallel
realtime continuousdataow embedded systems This paper describes the design of a
global clock subsystem which is an essential component of an event trace tool A new
amalgam of algorithms is proposed which attends to the tradeo between clock accuracy
and the need to restrict disturbance of the application whilst recording traces The details
of an implementation on a hybrid parallel processor as well as the results of tracing
applications in the given problem domain are included
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