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Path-Specific Timing Constrain
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2010-01-11
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Path-Specific Timing Constraints:Constraining Between Rising
and Falling Clock Edges
• The PERIOD constraint automatically accounts for two-phase clocks
– Includes adjustments for non-50-percent duty-cycle clocks
• Example: A PERIOD constraint of 10 ns on CLK will apply a 5-ns constraint
between these two flip-flops
• No path-specific constraints are required for this case
and Falling Clock Edges
• The PERIOD constraint automatically accounts for two-phase clocks
– Includes adjustments for non-50-percent duty-cycle clocks
• Example: A PERIOD constraint of 10 ns on CLK will apply a 5-ns constraint
between these two flip-flops
• No path-specific constraints are required for this case
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