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Determining Minimum Acquisitio
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2010-06-01
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This application report analyzes a simple method for calculating minimum acquisition times for
successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different test cases are subsequently evaluated using both precise and approximated equations.
successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different test cases are subsequently evaluated using both precise and approximated equations.
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