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PCF8582E pdf datasheet
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PCX8582X-2 Family 256 x 8-bit CMOS EEPROMS with I2C-bus interface
The PCX8582X-2 is a 2-Kbit (256 ´ 8-bit) floating gate
electrically erasable programmable read only memory
(EEPROM). By using an internal redundant storage code
it is fault tolerant to single bit errors. This feature
dramatically increases reliability compared to conventional
EEPROM memories.
Power consumption is low due to the full CMOS
technology used. The programming voltage is generated
on-chip, using a voltage multiplier.
As data bytes are received and transmitted via the serial
I2C-bus, a package using eight pins is sufficient. Up to
eight PCX8582X-2 devices may be connected to the
I2C-bus. Chip select is accomplished by three address
inputs (A0, A1, A2).
Timing of the ERASE/WRITE cycle is carried out
internally, thus no external components are required. Pin 7
(PTC) must be connected to either VDD or left open-circuit.
There is an option of using an external clock for timing the
length of an ERASE/WRITE cycle.
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