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SN54AHC126, SN74AHC126,pdf(QUA

消耗积分:2 | 格式:rar | 大小:703 | 2010-07-16

h1708587244.0670

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The ’AHC126 devices are quadruple bus buffer gates featuring independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low. When OE is high, the respective gate passes the data from the A input to its Y output.

To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

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