×

SN74ACT2235-30,pdf(1024×9×2 AS

消耗积分:3 | 格式:rar | 大小:287 | 2010-08-19

分享资料个

A FIFO memory is a storage device that allows data to be written into and read from its array at independent data rates. The SN74ACT2235 is arranged as two 1024 × 9-bit FIFOs for high speed and fast access times. It processes data at rates up to 50 MHz, with access times of 25 ns in a bit-parallel format.

The SN74ACT2235 consists of bus-transceiver circuits, two 1024 × 9-bit FIFOs, and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal FIFO memories. Enable (GAB and GBA) inputs are provided to control the transceiver functions. The select-control (SAB and SBA) inputs are provided to select whether real-time or stored data is transferred. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data.

声明:本文内容及配图由入驻作者撰写或者入驻合作网站授权转载。文章观点仅代表作者本人,不代表电子发烧友网立场。文章及其配图仅供工程师学习之用,如有内容侵权或者其他违规问题,请联系本站处理。 举报投诉

评论(0)
发评论

下载排行榜

全部0条评论

快来发表一下你的评论吧 !